The Designer's Guide to VHDL

Peter J. Ashenden

Suggestions for Exercises

This page contains numerous suggestions for VHDL design exercises. Some of them are incorporated as exercises in The Designer's Guide to VHDL, and others are the ones I passed over for various reasons. They are listed here under rough categories, and vary randomly in complexity from very simple to major term projects.

Coming up with ideas for design exercises can be quite a difficult task, as I found when developing the exercises for the book. If you are learning VHDL, this page may give you some ideas for projects to practice VHDL design skills. If you are a VHDL instructor, I hope this page will provide some inspiration for exercises for your students.

Combinatorial Logic

Storage Elements


Shift Registers

Subprograms and Packages

Generated Structures